Some fundamental concepts

Hello everyone!
Its been a very long time since I post!
So today we will be learning about basic instruction cycle, single bus organization of processor.

Lets begin with the topic!

Before going to discuss design approaches for processor unit we first get familiar with the functions of it. The primary function of a processor unit is to execute sequence of instructions stored in a memory, which is external to the processor unit. The sequence of operations involved in processing an instruction constitutes an instruction cycle, which can be subdivided into three major phases:
Fetch cycle, decode cycle and execute cycle.
This is illustrated as shown below

To perform fetch, decode and execute cycles the processor unit has to perform set of operations called micro operations.
The following fig shows the single bus organization of processor unit. It shows how the building blocks of processor unit are organised and how they are interconnected. They can be organized in a variety of ways.
The fig below shows one organization, in which the arithmetic and logic unit and all processor registers are connected through a single common bus. It also shows the external memory bus connected to memory address(MAR) and data register(MDR).

The registers Y,Z and temp in fig are used only by the CPU unit for temporary storage during the execution of some instructions. These registers are never used for storing data generated by one instruction for later use by another instruction. The programmer can not access these registers. The IR and the instruction decoder are integral parts of the control circuitry in the CPU unit. All other registers and the ALU are used for storing and manipulating data. The data registers, ALU and the interconnecting bus is referred to as data path.



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