Conditional Codes

Conditional Codes


The condition code flags are used to store the results of certain condition when certain operation are performed during execution of the program.
The condition code flags are stored in the status registers. The status register is also referred is also referred to as flag register. ALU operations and certain register operations may set or reset one or more bits in the status register. Status bits lead to a new set of microprocessor instructions. These instructions permit the execution of a program to change flow on the basis of the condition of bits in the status register. So the condition bits in the status register can be used to take logical decisions within the program. Some of the common condition code flags are:

  1. Carry/Borrow : The carry bit is set when the summation of two 8-bit numbers is greater than 1111 1111(FFH). A borrow is generated when a large number is subtracted from a smaller number.
  2. Zero : The zero bit is set when the contents of register are zero after any operation. This happens not only when you decrement the register, but also when any arithmetic or logic operation causes the contents of register to be zero.
  3. Negative or sign : In 2's compliment arithmetic, the most significant bit is a sign bit. If this bit is logic 1, the number is negative number, otherwise a positive number. The negative bit or sign bit is set when any arithmetic or logical operation gives a negative result.
  4. Auxiliary carry : The auxiliary carry bit of status register is set when an addition in the first four bits causes a carry into the 5th bit. This is often referred as half carry or intermediate carry. This is used in the BCD arithmetic.
  5. Overflow flag : In 2's complement arithmetic, most significant bit is used to represent sign and remaining bits are used to represent magnitude of a number. This flag is set if the result of a signed operation is too large to fit in the number of bits available to represent it.
  6. Parity : When the result of an operation leave the indicated register with an even number of 1's, parity bit is set.

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